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PIC18F87J11 FAMILY
DS39778E-page 56
2007-2012 Microchip Technology Inc.
REGISTER 5-1:
RCON: RESET CONTROL REGISTER
R/W-0
U-0
R/W-1
R-1
R/W-0
IPEN
—CM
RI
TO
PD
POR
BOR
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
IPEN:
Interrupt Priority Enable bit
1
= Enables priority levels on interrupts
0
= Disables priority levels on interrupts (PIC16CXXX Compatibility mode)
bit 6
Unimplemented:
Read as ‘0’
bit 5
CM:
Configuration Mismatch Flag bit
1
= A Configuration Mismatch Reset has not occurred
0
= A Configuration Mismatch Reset has occurred (must be set in software after a Configuration
Mismatch Reset occurs)
bit 4
RI: RESET
Instruction Flag bit
1
= The RESET instruction was not executed (set by firmware only)
0
= The RESET instruction was executed, causing a device Reset (must be set in software after a
Brown-out Reset occurs)
bit 3
TO:
Watchdog Time-out Flag bit
1
= Set by power-up, CLRWDT instruction or SLEEP instruction
0
= A WDT time-out occurred
bit 2
PD:
Power-Down Detection Flag bit
1
= Set by power-up or by the CLRWDT instruction
0
= Set by execution of the SLEEP instruction
bit 1
POR:
Power-on Reset Status bit
1
= A Power-on Reset has not occurred (set by firmware only)
0
= A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
bit 0
BOR:
Brown-out Reset Status bit
1
= A Brown-out Reset has not occurred (set by firmware only)
0
= A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)
Note 1:
It is recommended that the POR bit be set after a Power-on Reset has been detected, so that subsequent
Power-on Resets may be detected.
2:
If the on-chip voltage regulator is disabled, BOR remains at ‘0’ at all times. See Section 5.4.1 “Detecting
BOR”
for more information.
3:
Brown-out Reset is said to have occurred when BOR is ‘0’ and POR is ‘1’ (assuming that POR was set to
‘1’ by software immediately after a Power-on Reset).
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